Regviz

NXP Semiconductors /LPC15xx /SCTIPU /ABORT_ENABLE3

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ABORT_ENABLE3

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC15xx/SCTIPU/ABORT_ENABLE3#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED_)ENA0 0 (DISABLED_)ENA1 0 (DISABLED_)ENA2 0 (DISABLED_)ENA3 0 (DISABLED_)ENA4 0 (DISABLED_)ENA5 0 (DISABLED_)ENA6 0 (DISABLED_)ENA7 0 (DISABLED_)ENA8

ENA1=DISABLED_, ENA7=DISABLED_, ENA3=DISABLED_, ENA6=DISABLED_, ENA5=DISABLED_, ENA4=DISABLED_, ENA8=DISABLED_, ENA0=DISABLED_, ENA2=DISABLED_

Description

SCT IPU abort enable register: Selects which input source contributes to ORed Abort Output 0.

Fields

ENA0

Enable abort source SCT_ABORT0.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.
ENA1

Enable abort source SCT_ABORT1.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.
ENA2

Enable abort source ACMP0 output.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.
ENA3

Enable abort source ACMP1 output.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.
ENA4

Enable abort source ACMP2 output.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.
ENA5

Enable abort source ACMP3 output.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.
ENA6

Enable abort source SCT0_OUT9.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.
ENA7

Enable abort source ADC0_THCMP_IRQ.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.
ENA8

Enable abort source ADC1_THCMP_IRQ.

0 (DISABLED_): Disabled.

1 (ENABLED_): Enabled.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data